Introduction to Verilog & System Verilog –
This training aims to introduce Verilog and System Verilog to Students/Junior Engineers. It provides an opportunity to understand both the basics and advanced concepts of Verilog and System Verilog. It also provides an opportunity to build a design in Verilog and verify the design with the labs associated with the training.
Skills provided – C/C++, Verilog, System Verilog, Perl.
Comprehensive System Verilog for Verification –
This training aims to strengthen your System Verilog skills with more advanced topics and complex problems to be introduced in an industry level project. It provides an opportunity to architect a test bench for a complex design from scratch and able to verify the design completely with 100% coverage.
Skills provided – Verilog, System Verilog, Perl.
Comprehensive UVM for Verification –
This training aims to introduce UVM and strengthen your system Verilog and UVM skills. The labs associated with this training involve building a UVM test bench from scratch and verify the sample design completely with 100% coverage.
Skills Provided – Verilog, System Verilog, UVM, Perl.
Introduction to FPGA Design/Prototyping –
This training aims to introduce prototyping a design in a FPGA. The lab associated with this training provide an opportunity to work on a design and emulate them on the FPGA starter kits from Xilinx and others.
Skills Provided – Verilog, FPGA’s, scripting, emulation.
All these training modules are training cum 100% job after completion of training in semiconductors domains like Design, Verification.
Training Period : 3-4 months(Mon – Fri)
Training Location : Hyderabad
Who can join : 2014/2015/2016 B.Tech/M.Tech
Trainers : 10+ years exp in Top product based semiconductor companies
If any one interested reach me at firstname.lastname@example.org